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Mt Xia:
Business Continuity/Disaster Recovery Methodologies
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BC/DR Methodologies |
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Special Interest Topics:
During a Disaster Recovery (DR) implementation effort, the last thing you want is unexpected hardware and software configuration issues. These tend to consume time, resources, and cause Recovery Time Objectives (RTO) to be missed. In order to ensure business continuity, organizations must design, implement, maintain and enforce policies, procedures, standards, and guidelines that encompass all aspects of their critical business functions. A successful DR effort is not only dependent upon a well thought-out DR plan; it must have been derived from an enterprise wide mentality of business continuity. Furthermore, business continuity must be the beginning point in systems design, not the ending point. Unfortunately, very few systems are built starting from the business continuity perspective and working backwards. The documentation referenced here describes the policies, guidelines, standards and procedures for insuring business continuity for the business functions supported using IBM's Power 5 architecture. This architecture supports the ability to provide capacity on-demand and virtual I/O. The ability to micro-partition using pieces of a processor and dynamically allocate and deallocate memory is supported in this environment as well. The Power 5 architecture provides the ability to define LPAR's and Virtual LPAR's. The difference between an LPAR and a Virtual LPAR is the implementation of the virtualization features. The Power 5 architecture allows the sytem administrator to configure logical partitions with dedicated resources such as processors, memory, and I/O adapters. The system administrator may also configure logical partitions utilizing shared processors, memory, and virtualized I/O adapters. The virtual I/O adapters are configured and made available to the LPAR's via the VIO server. The VIO server provides the ability to reduce the number of adapters required to support multiple LPAR's by virtualizing the hardware and allowing multiple LPAR's to share the same hardware I/O adapters.
Additional documents of interest
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For information regarding this page, contact
Dana French ( dfrench@mtxia.com )
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